高級ASIC設(shè)計工程師崗位職責

職責描述:

1.與架構(gòu)師合作,編寫設(shè)計文檔。

2.完成RTL編碼、UT。

3.協(xié)助驗證工作,提升驗證覆蓋率,支持FPGA測試。

4.協(xié)助后端工作,支持STA、Formality、DFT、ATE等各項流程。

任職要求:

1.5年以上Verilog/ASIC設(shè)計經(jīng)驗。

2.精通綜合工具和靜態(tài)時序分析方法。

3.具有數(shù)據(jù)網(wǎng)絡(luò)二層/三層交換芯片的的經(jīng)驗,熟悉網(wǎng)絡(luò)測試工具和測試方法。

4.熟悉TCL或者Perl腳本語言。

5.團隊合作精神。

6.熟悉DFT、ScanInsertion、ATE等。

高級ASIC設(shè)計工程師崗位

篇2:ASIC數(shù)字電路工程師崗位職責

ASICVerificationEngineer數(shù)字電路驗證工程師北京百瑞互聯(lián)技術(shù)有限公司北京百瑞互聯(lián)技術(shù)有限公司,百瑞JobDescription

?IndependentSoCverification

?Responsibleforgoldenmodelsandmicro-architectureusingUVM

?UPFbasedLowpowerverification

?Postsimulationandfunctionalpatterngenerationfortesting

?SupportASICimplementation

?SupportFPGAprototyping

?Supportsoftwareandsystemproductions

?Writeverificationplandocuments

Qualifications

?2+yearshands-onexperienceinASICRTLdesign.ExperienceinBluetooth,MobileComputingorIoTisaplus

?FamiliarwithUVMverification

?Experienceinverificationusingrandomstimulusalongwithfunctionalcoverageandassertion-basedverificationmethodologies

?Experienceincraftingtestbenchenvironmentsforblockandsystemlevelverification

?Strongdebuggingandanalyticalskills

?ASICdesignverificationandimplementationflowknowledge

?GoodknowledgetoUPFandlowpowerverification(forexampleVCLP,VerdiPAandVCS-NLP)

?Englishdocumentsreading

?GoodprogramminginPerl/Python,TCLandShellprogramming

?Goodteamworkandcommunicationskills

篇3:ASIC數(shù)字電路設(shè)計工程師崗位職責

ASICDesignEngineer數(shù)字電路設(shè)計工程師北京百瑞互聯(lián)技術(shù)有限公司北京百瑞互聯(lián)技術(shù)有限公司,百瑞JobDescription

?IndependentblockandSoCRTLdesignandverification

?AnaloganddigitalIPintegration

?RTLhandoffqualitycheckusingEDAtools

?PreparesignoffqualityfullchipSDCfile

?PreparesignoffqualityfullchipUPFfile

?SupportASICimplementation

?SupportFPGAprototyping

?SupportDFTintegration

?Supportsoftwareandsystemproduction

?Writedesigndocuments

Qualifications

?2+yearshands-onexperienceinASICRTLdesign.ExperienceinBluetooth,MobileComputingorIoTisaplus

?FamiliarwithpopularASICsolutions(includingspecificationandarchitecture)

?FamiliarwithASICdesignverificationandimplementationflow

?FamiliarwithrelevantQAtools(forexampleSpyglass)

?Strongdebuggingandanalyticalskills,generateideas,andprovideinnovativesolutionstosolvetechnicalproblems

?Englishdocumentsreading

?GoodprogramminginPerl/Python,TCLandShellprogramming

?Self-motivated,teamwork,andgoodcommunicationskills