芯片邏輯崗位職責(zé)

職責(zé)描述:

1、負(fù)責(zé)MRAM芯片及相關(guān)邏輯模塊的規(guī)格定義、邏輯設(shè)計(jì)、RTL代碼編寫、仿真驗(yàn)證、綜合、時(shí)序、可測性和芯片測試;

2、負(fù)責(zé)MRAM芯片邏輯/前端的綜合、時(shí)序,仿真。

任職要求:

1、計(jì)算機(jī)、電子工程、微電子及相關(guān)專業(yè),本科及以上學(xué)歷;

2、兩年以上數(shù)字IP和SoC設(shè)計(jì)相關(guān)經(jīng)驗(yàn);

3、精通Verilog和C語言,了解各種硬件邏輯結(jié)構(gòu)和相關(guān)驗(yàn)證方法;

4、熟練掌握各種前端SoC設(shè)計(jì)EDA工具,具有一定的文檔編輯和處理能力;

5、具有DDR4、ECC和memoryBIST等相關(guān)經(jīng)驗(yàn)者優(yōu)先;

6、具有良好的溝通能力和團(tuán)隊(duì)精神。

篇2:模擬芯片崗位職責(zé)

模擬混合芯片設(shè)計(jì)經(jīng)理瀚芯咨詢上海瀚芯商務(wù)咨詢有限公司,瀚芯咨詢,瀚芯模擬混合芯片設(shè)計(jì)經(jīng)理(歐美公司,有海外出差及工作機(jī)會(huì))

DesignManager-AnalogandMixSignal

Location:Zhangjiang,Shanghai

KeyAreasofResponsibilities:

LeadanalogmixedsignalIPandchipprojectsinfollowingareas

?Audiocircuits

?Dataconverters

?PLLsandoscillators

?Filtersandamplifiers

?Voltageandcurrentreferences

?LDOsandotherpowermanagementcircuits

?DC/DCconverters

?I/OsandESDprotection

LeadAnalogandMixedSignalteam

?ManageAnalogandMixSignalgroupwhichincludesdesign,verification,layout,andvalidation

?ManageprojectswithUSteameitheraschipandAnalogandMixSignalblocklead,andwillingtotravelwhenneeded(typically2-3timesperyear).

?Manageoutsidesuppliersofdesignservices

RequiredSkillsandAttributes:

?BSinElectricalEngineering,orequivalent

?7+years,with2+yearsinaleadershiprole

?Deepknowledgeofanalogandmixsignaldesignflows,analogcircuitsdesign,andtransistorlevellayout

?Skilledintiminganalysis,lowpowerdesign,andtape-out

?ExperiencewithHspiceandCadenceschematictools

?ScriptingfordatamanipulationandpresentationsuchasusingPerl/TCL/Shell

?Post-siliconvalidationexperienceincludingbenchdebuggingability

?Successfulgroupmanagerinteambuilding,development,andretention

?Successfulprojectmanagementexperiencewitheffectiveandproactiveinterpersonalandcommunicationskillsandanownershipmindset

?Motivatedteamplayerwithcustomerandqualityfocus

?Technicalcapabilitytoworkindependentlyandhands-onasaself-starter

?Analyticalandpersistentinresolvingtechnicalissues.

?Possessstrongworkethicswithhonestyandintegrity

篇3:IC芯片設(shè)計(jì)工程師崗位職責(zé)

SOCIC芯片設(shè)計(jì)工程師SOC設(shè)計(jì)工程師

職位描述

1.ARMSOC架構(gòu)設(shè)計(jì)

2.ARMSOC頂層集成

2.ARMSOC的模塊設(shè)計(jì)

任職要求Musthave:

1.精通Verilog語言

2.了解UVM方法學(xué);

3.2-4年芯片設(shè)計(jì)經(jīng)驗(yàn);

4.1個(gè)以上的SOC項(xiàng)目設(shè)計(jì)經(jīng)驗(yàn)

5.精通AMBA協(xié)議

6.良好的溝通能力和團(tuán)隊(duì)合作能力

Preferredtohave:

1.ARM子系統(tǒng)設(shè)計(jì)經(jīng)驗(yàn)

2.AMBA總線互聯(lián)設(shè)計(jì)

3.DDR3/4,SD/SDIO設(shè)計(jì)經(jīng)驗(yàn)

4.UART/SPI/IIC設(shè)計(jì)調(diào)試經(jīng)驗(yàn)

5.芯片集成經(jīng)驗(yàn)

IC設(shè)計(jì)工程師

職位描述

1.完成基帶算法的邏輯實(shí)現(xiàn)

2.完成基帶設(shè)計(jì)的驗(yàn)證

3.配合后端實(shí)現(xiàn)流程要求,提供時(shí)序約束

任職要求Musthave:

1.具有一定芯片設(shè)計(jì)經(jīng)驗(yàn)

2.精通Verilog,C語言

3..了解UVM方法學(xué);

4.3-4年算法實(shí)現(xiàn)經(jīng)驗(yàn)

5.良好的溝通能力和團(tuán)隊(duì)合作能力

Preferredtohave:

1.通信導(dǎo)航背景

2.導(dǎo)航基帶設(shè)計(jì)經(jīng)驗(yàn)

SOC設(shè)計(jì)工程師

職位描述

1.ARMSOC架構(gòu)設(shè)計(jì)

2.ARMSOC頂層集成

2.ARMSOC的模塊設(shè)計(jì)

任職要求Musthave:

1.精通Verilog語言

2.了解UVM方法學(xué);

3.2-4年芯片設(shè)計(jì)經(jīng)驗(yàn);

4.1個(gè)以上的SOC項(xiàng)目設(shè)計(jì)經(jīng)驗(yàn)

5.精通AMBA協(xié)議

6.良好的溝通能力和團(tuán)隊(duì)合作能力

Preferredtohave:

1.ARM子系統(tǒng)設(shè)計(jì)經(jīng)驗(yàn)

2.AMBA總線互聯(lián)設(shè)計(jì)

3.DDR3/4,SD/SDIO設(shè)計(jì)經(jīng)驗(yàn)

4.UART/SPI/IIC設(shè)計(jì)調(diào)試經(jīng)驗(yàn)

5.芯片集成經(jīng)驗(yàn)

IC設(shè)計(jì)工程師

職位描述

1.完成基帶算法的邏輯實(shí)現(xiàn)

2.完成基帶設(shè)計(jì)的驗(yàn)證

3.配合后端實(shí)現(xiàn)流程要求,提供時(shí)序約束

任職要求Musthave:

1.具有一定芯片設(shè)計(jì)經(jīng)驗(yàn)

2.精通Verilog,C語言

3..了解UVM方法學(xué);

4.3-4年算法實(shí)現(xiàn)經(jīng)驗(yàn)

5.良好的溝通能力和團(tuán)隊(duì)合作能力

Preferredtohave:

1.通信導(dǎo)航背景

2.導(dǎo)航基帶設(shè)計(jì)經(jīng)驗(yàn)